View AFL12005DZ-ES_3767139.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

07/09/02 www.irf.com 1 advanced analog high reliability hybrid dc/dc converters afl50xxs series the afl series of dc/dc converters feature high power density with no derating over the full military tempera- ture range. this series is offered as part of a complete family of converters providing single and dual output voltages and operating from nominal +28, +50, +120 or +270 volt inputs with output power ranging from 80 to 120 watts. for applications requiring higher output power, individual converters can be operated in paral- lel. the internal current sharing circuits assure equal current distribution among the paralleled converters. this series incorporates advanced analog?s proprietary mag- netic pulse feedback technology providing optimum dynamic line and load regulation response. this feed- back system samples the output voltage at the pulse width modulator fixed clock frequency, nominally 550 khz. multiple converters can be synchronized to a sys- tem clock in the 500 khz to 700 khz range or to the synchronization output of one converter. undervoltage lockout, primary and secondary referenced inhibit, soft- start and load fault protection are provided on all mod- els. these converters are hermetically packaged in two en- closure variations, utilizing copper core pins to mini- mize resistive dc losses. three lead styles are avail- able, each fabricated with advanced analog?s rugged ceramic lead-to-package seal assuring long term hermeticity in the most harsh environments. description 30 to 80 volt input range 3.3 , 5, 8, 9 12, 15, 24 and 28 volts outputs available high power density - up to 84 w / in 3 up to 120 watt output power parallel operation with stress and current sharing low profile (0.380") seam welded package ceramic feedthru copper core pins high efficiency - to 85% full military temperature range continuous short circuit and overload protection remote sensing terminals primary and secondary referenced inhibit functions line rejection > 40 db - dc to 50khz external synchronization port fault tolerant design dual output versions available standard military drawings available features afl 50v input, single output manufactured in a facility fully qualified to mil-prf- 38534, these converters are available in four screening grades to satisfy a wide range of requirements. the ch grade is fully compliant to the requirements of mil-h- 38534 for class h. the hb grade is fully processed and screened to the class h requirement, may not neces- sarily meet all of the other mil-prf-38534 requirements, e.g., element evaluation and periodic inspection (p.i.) not required. both grades are tested to meet the com- plete group ?a? test specification over the full military temperature range without output power deration. two grades with more limited screening are also available for use in less demanding applications. variations in electrical, mechanical and screen- ing can be accommodated. contact advanced analog for special requirements. pd - 94457a
2 www.irf.com afl50xxs series specifications static characteristics -55c < t case < +125c, 30v < v in < 80v unless otherwise specified. for notes to specifications, refer to page 4 absolute maximum ratings input voltage -0.5v to 100v soldering temperature 300c for 10 seconds case temperature operating -55c to +125c storage -65c to +135c parameter group a subgroups test conditions min nom max unit input voltage note 6 30 50 80 v output voltage afl5005s afl5008s afl5009s afl5012s afl5015s afl5028s afl5005s afl5008s afl5009s afl5012s afl5015s afl5028s 1 1 1 1 1 1 2, 3 2, 3 2, 3 2, 3 2, 3 2, 3 v in = 50 volts, 100% load 4.95 7.92 8.91 11.88 14.85 27.72 4.90 7.84 8.82 11.76 14.70 27.44 5.00 8.00 9.00 12.00 15.00 28.00 5.05 8.08 9.09 12.12 15.15 28.28 5.10 8.16 9.18 12.24 15.30 28.56 v v v v v v v v v v v v output current afl5005s afl5008s afl5009s afl5012s afl5015s afl5028s v in = 30, 50, 80 volts - note 6 16.0 10.0 10.0 9.0 8.0 4.0 a a a a a a output power afl5005s afl5008s afl5009s afl5012s afl5015s afl5028s note 6 80 80 90 108 120 112 w w w w w w maximum capacitive load note 1 10,000 fd output voltage temperature coefficient v in = 50 volts, 100% load - note 1, 6 -0.015 +0.015 %/c output voltage regulation afl5028s line all others line load 1, 2, 3 1, 2, 3 1, 2, 3 no load, 50% load, 100% load v in = 30, 50, 80 volts -70.0 -20.0 -1.0 +70.0 +20.0 +1.0 mv mv % output ripple voltage afl5005s afl5008s afl5009s afl5012s afl5015s afl5028s 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 v in = 30, 50, 80 volts, 100% load, bw = 10mhz 30 40 40 45 50 100 mv pp mv pp mv pp mv pp mv pp mv pp
www.irf.com 3 afl50xxs series static characteristics (continued) for notes to specifications, refer to page 4 parameter group a subgroups test conditions min nom max unit input current no load inhibit 1 inhibit 2 1 2, 3 1, 2, 3 1, 2, 3 v in = 50 volts i out = 0 pin 4 shorted to pin 2 pin 12 shorted to pin 8 50 60 5 5 ma ma ma ma input ripple current afl5005s afl5008s afl5009s afl5012s afl5015s afl5028s 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 v in = 50 volts, 100% load, bw = 10mhz 60 60 60 60 60 60 ma pp ma pp ma pp ma pp ma pp ma pp current limit point as a percentage of full rated load 1 2 3 v out = 90% v nom , v in = 50 volts note 5 115 105 125 125 115 140 % % % load fault power dissipation overload or short circuit 1, 2, 3 v in = 50 volts 32 w efficiency afl5005s afl5008s afl5009s afl5012s afl5015s afl5028s 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 v in = 50 volts, 100% load 78 79 80 81 82 82 81 82 83 84 85 84 % % % % % % enable inputs (inhibit function) converter off sink current converter on sink current 1, 2, 3 1, 2, 3 logical low on pin 4 or pin 12 note 1 logical high on pin 4 and pin 12 - note 9 note 1 -0.5 2.0 0.8 100 50 100 v a v a switching frequency 1, 2, 3 500 550 600 khz synchronization input frequency range pulse amplitude, hi pulse amplitude, lo pulse rise time pulse duty cycle 1, 2, 3 1, 2, 3 1, 2, 3 note 1 note 1 500 2.0 -0.5 20 700 10 0.8 100 80 khz v v nsec % isolation 1 input to output or any pin to case (except pin 3). test @ 500vdc 100 m ? device weight slight variations with case style 85 gms mtbf mil-hdbk-217f, aif @ t c = 40c 300 khrs
4 www.irf.com afl50xxs series dynamic characteristics -55c < t case < +125c, v in =50v unless otherwise specified. parameter group a subgroups test conditions min nom max unit load transient response afl5005s amplitude recovery amplitude recovery afl5008s amplitude recovery amplitude recovery afl5009s amplitude recovery amplitude recovery afl5012s amplitude recovery amplitude recovery afl5015s amplitude recovery amplitude recovery afl5028s amplitude recovery amplitude recovery 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 4, 5, 6 note 2, 8 load step 50% ? 100% load step 10% ? 50% load step 50% ? 100% load step 10% ? 50% load step 50% ? 100% load step 10% ? 50% load step 50% ? 100% load step 10% ? 50% load step 50% ? 100% load step 10% ? 50% load step 50% ? 100% load step 10% ? 50% -450 -450 -500 -500 -600 -600 -750 -750 -750 -750 -1200 -1200 450 200 450 300 500 200 500 300 600 200 600 300 750 200 750 300 750 200 750 300 1200 200 1200 300 mv sec mv sec mv sec mv sec mv sec mv sec mv sec mv sec mv sec mv sec mv sec mv sec line transient response amplitude recovery note 1, 2, 3 v in step = 30 ? 80 volts -500 500 500 mv sec turn-on characteristics overshoot delay 4, 5, 6 4, 5, 6 v in = 30, 50, 80 volts. note 4 enable 1, 2 on. (pins 4, 12 high or open) 50 75 250 120 mv msec load fault recovery same as turn on characteristics. line rejection mil-std-461d, cs101, 30hz to 50khz note 1 40 50 db notes to specifications: 1. parameters not 100% tested but are guaranteed to the limits specified in the table. 2. recovery time is measured from the initiation of the transient to where v out has returned to within 1% of v out at 50% load. 3. line transient transition time 100 sec. 4. turn-on delay is measured with an input voltage rise time of between 100 and 500 volts per millisecond. 5. current limit point is that condition of excess load causing output voltage to drop to 90% of nominal. 6. parameter verified as part of another test. 7. all electrical tests are performed with the remote sense leads connected to the output leads at the load. 8. load transient transition time 10 sec. 9. enable inputs internally pulled high. nominal open circuit voltage 4.0vdc.
www.irf.com 5 afl50xxs series afl50xxs circuit description figure i. afl single output block diagram figure ii. enable input equivalent circuit circuit operation and application information inhibiting converter output as an alternative to application and removal of the dc volt- age to the input, the user can control the converter output by providing ttl compatible, positive logic signals to either of two enable pins (pin 4 or 12). the distinction between these two signal ports is that enable 1 (pin 4) is referenced to the input return (pin 2) while enable 2 (pin 12) is refer- enced to the output return (pin 8). thus, the user has access to an inhibit function on either side of the isolation barrier. each port is internally pulled ?high? so that when not used, an open connection on both enable pins permits nor- mal converter operation. when their use is desired, a logi- cal ?low? on either port will shut the converter down. 1 dc input enable 1 4 sync outp ut 5 6 sync inp ut case 3 2 input retu rn input filter primary bias su pp l y control f b output filter current sense error amp & ref share am p lifier sense amplifier 7 + output 10 + sense 11 s hare 12 e nable 2 9 - sense 8 o utput return the afl series of converters employ a forward switched mode converter topology. (refer to figure i.) operation of the device is initiated when a dc voltage whose magnitude is within the specified input limits is applied between pins 1 and 2. if pin 4 is enabled (at a logical 1 or open) the primary bias supply will begin generating a regulated housekeeping voltage bringing the circuitry on the primary side of the converter to life. a power mosfet is used to chop the dc input voltage into a high frequency square wave, applying this chopped voltage to the power transformer at the nomi- nal converter switching frequency. maintaining a dc volt- age within the specified operating range at the input as- sures continuous generation of the primary bias voltage. the switched voltage impressed on the secondary output transformer winding is rectified and filtered to generate the converter dc output voltage. an error amplifier on the sec- ondary side compares the output voltage to a precision reference and generates an error signal proportional to the difference. this error signal is magnetically coupled through the feedback transformer into the controller section of the converter varying the pulse width of the square wave signal driving the mosfet, narrowing the width if the output volt- age is too high and widening it if it is too low, thereby regulat- ing the output voltage. remote sensing connection of the + and - sense leads at a remotely located load permits compensation for excessive resistance be- tween the converter output and the load when their physical separation could cause undesirable voltage drop. this con- nection allows regulation to the placard voltage at the point of application. when the remote sensing feature is not used, the sense lead should be connected to their respective output terminals at the converter. figure iii. illustrates a typical remotely sensed application. disable 100k 290k 180k 1n4148 2n3904 +5.6 v pin 4 or pin 12 pin 2 or pin 8
6 www.irf.com afl50xxs series figure iii. preferred connection for parallel operation synchronization of multiple converters parallel operation-current and stress sharing internally, these ports differ slightly in their function. in use, a low on enable 1 completely shuts down all circuits in the converter, while a low on enable 2 shuts down the second- ary side while altering the controller duty cycle to near zero. externally, the use of either port is transparent to the user save for minor differences in idle current. (see specification table). when operating multiple converters, system requirements often dictate operation of the converters at a common fre- quency. to accommodate this requirement, the afl series converters provide both a synchronization input and out- put. the sync input port permits synchronization of an afl co- nverter to any compatible external frequency source oper- ating between 500 and 700 khz. this input signal should be referenced to the input return and have a 10% to 90% duty cycle. compatibility requires transition times less th an 100 ns, maximum low level of +0.8 volts and a minimum high level of +2.0 volts. the sync output of another converter which has been designated as the master oscillator pro- vides a convenient frequency source for this mode of op- eration. when external synchronization is not required, the sync in pin should be left open (unconnected )thereby per- mitting the converter to operate at its? own internally set frequency. the sync output signal is a continuous pulse train set at 550 50 khz, with a duty cycle of 15 5%. this signal is referenced to the input return and has been tailored to be compatible with the afl sync input port. transition times are less than 100 ns and the low level output impedance is less than 50 ohms. this signal is active when the dc input voltage is within the specified operating range and the con- verter is not inhibited. this output has adequate drive re- serve to synchronize at least five additional converters. a typical connection is illustrated in figure iii. figure iii. illustrates the preferred connection scheme for operation of a set of afl converters with outputs operating in parallel. use of this connection permits equal sharing among the members of a set whose load current exceeds the capacity of an individual afl. an important feaure of the afl series operating in the parallel mode is that in addition to sharing the current, the stress induced by temperature will also be shared. thus if one member of a paralleled set is operating at a higher case temperature, the current it provides to the load will be reduced as compensation for the temperature induced stress on that device. optional s y nchronization connection power input (other converters) share bus 1 6 afl 7 12 - sense enable 2 + vout return + sense share vin rtn case enable 1 s y nc out s y nc in 1 6 afl 7 12 - sense enable 2 + vout return + sense share vin rtn case enable 1 s y nc out s y nc in 1 6 afl 7 12 - sense enable 2 + vout return + sense share vin rtn case enable 1 s y nc out s y nc in to load
www.irf.com 7 afl50xxs series a conservative aid to estimating the total heat sink surface area (a heat sink ) required to set the maximum case temp- erature rise ( ? t) above ambient temperature is given by the following expression: a heat sink ? ? ? ? ? ? ? ? ? t p 80 30 085 143 . . . where ? t pp eff out = ==? ? ? ? ? ? ? case temperature rise above ambient device dissipation in watts 1 1 ? t = 85 - 25 = 60c and the required heat sink area is if the worst case full load efficiency for this device is 83%; then the power dissipation at full load is given by because of the incorporation of many innovative techno- logical concepts, the afl series of converters is capable of providing very high output power from a package of very small volume. these magnitudes of power density can only be obtained by combining high circuit efficiency with effec- tive methods of heat removal from the die junctions. this requirement has been effectively addressed inside the de- vice; but when operating at maximum loads, a significant amount of heat will be generated and this heat must be conducted away from the case. to maintain the case tem- perature at or below the specified maximum of 125c, this heat must be transferred by conduction to an appropriate heat dissipater held in intimate contact with the converter base-plate. when operating in the shared mode, it is important that symmetry of connection be maintained as an assurance of optimum load sharing performance. thus, converter out- puts should be connected to the load with equal lengths of wire of the same gauge and sense leads from each con- verter should be connected to a common physical point, preferably at the load along with the converter output and return leads. all converters in a paralleled set must have their share pins connected together. this arrangement is diagrammatically illustrated in figure iii. showing the out- puts and return pins connected at a star point which is located close as possible to the load. as a consequence of the topology utilized in the current sharing circuit, the share pin may be used for other func- tions. in applications requiring only a single converter, the voltage appearing on the share pin may be used as a ?cur- rent monitor?. the share pin open circuit voltage is nomi- nally +1.00v at no load and increases linearly with increas- ing output current to +2.20v at full load. 1 sil-pad is a registered trade mark of bergquist, minneapolis, mn thermal considerations since the effectiveness of this heat transfer is dependent on the intimacy of the baseplate/heatsink interface, it is strongly recommended that a high thermal conductivity heat transferring medium is inserted between the baseplate and heatsink. the material most frequently utilized at the fac- tory during all testing and burn-in processes is sold under the trade name of sil-pad ? 400 1 . this particular product is an insulator but electrically conductive versions are also available. use of these materials assures maximum sur- face contact with the heat dissipater thereby compensating for any minor surface variations. while other available types of heat conductive materials and thermal compounds pro- vide similar effectiveness, these alternatives are often less convenient and can be somewhat messy to use. as an example, it is desired to maintain the case tempera- ture of an afl5015s at +85c while operating in an open area whose ambient temperature is held at a constant +25c; then thus, a total heat sink surface area (including fins, if any) of 71 in 2 in this example, would limit case rise to 60c above ambient. a flat aluminum plate, 0.25" thick and of approxi- mate dimension 4" by 9" (36 in 2 per side) would suffice for this application in a still air environment. note that to meet the criteria in this example, both sides of the plate require unrestricted exposure to the ambient air. () p =? ? ? ? ? ? ? ? =? = 120 1 83 1 120 0 205 24 6 . ..w a = 60 80 24.6 in heat sink 0.85 ? ? ? ? ? ? ? ?= ? 143 2 30 71 . .
8 www.irf.com afl50xxs series input filter undervoltage lockout the afl50xxs series converters incorporate a lc input filter whose elements dominate the input load impedance characteristic at turn-on. the input circuit is as shown in figure iv. figure iv. input filter circuit output voltage adjust in addition to permitting close voltage regulation of remotely located loads, it is possible to utilize the converter sense pins to incrementally increase the output voltage over a limited range. the adjustments made possible by this method are intended as a means to ?trim? the output to a voltage setting for some particular application, but are not intended to create an adjustable output converter. these output voltage setting variations are obtained by connecting an appropriate resistor value between the +sense and -sense pins while connecting the -sense pin to the output return pin as shown in figure v. below. the range of adjustment and corresponding range of resistance values can be deter- mined by use of the following equation. r = 100 - -.025 adj nom out nom ? ? ? ? ? ? ? v vv where v nom = device nominal output voltage, and v out = desired output voltage figure v. connection for v out adjustment finding a resistor value for a particular output voltage, is simply a matter of substituting the desired output voltage and the nominal device voltage into the equation and solv- ing for the corresponding resistor value. note: r adj must be set 500 ? attempts to adjust the output voltage to a value greater than 120% of nominal should be avoided because of the poten- tial of exceeding internal component stress ratings and subsequent operation to failure. under no circumstance should the external setting resistor be made less than 500w. by remaining within this specified range of values, com- pletely safe operation fully within normal component derat- ing limits is assured. enable 2 share + sense - sense return + v out to load r adj afl50xxs examination of the equation relating output voltage and re- sistor value reveals a special benefit of the circuit topology utilized for remote sensing of output voltage in the afl50xxs series of converters. it is apparent that as the resistance increases, the output voltage approaches the nominal set value of the device. in fact the calculated limiting value of output voltage as the adjusting resistor becomes very large is 25mv above nominal device voltage. the consequence is that if the +sense connection is unin- tentionally broken, an afl50xxs has a fail-safe output volt- age of vout + 25mv, where the 25mv is independent of the nominal output voltage. it can be further demonstrated that in the event of both the + and - sense connections being broken, the output will be limited to vout + 440mv. this 440 mv is also essentially constant independent of the nominal output voltage. 0.75h pin 1 pin 2 2.7fd a minimum voltage is required at the input of the converter to initiate operation. this voltage is set to 26.5 1.5 volts. to preclude the possibility of noise or other variations at the input falsely initiating and halting converter operation, a hys- teresis of approximately 2 volts is incorporated in this cir- cuit. thus if the input voltage droops to 24.5 1.5 volts, the converter will shut down and remain inoperative until the input voltage returns to 25 volts.
www.irf.com 9 afl50xxs series general application information table 1. nominal resistance of cu wire the afl50xxs series of converters are capable of pro- viding large transient currents to user loads on demand. because the nominal input voltage range in this series is relatively low, the resulting input current demands will be correspondingly large. it is important therefore, that the line impedance be kept very low to prevent steady state and transient input currents from degrading the supply voltage between the voltage source and the converter input. in applications requiring high static currents and large tran- sients, it is recommended that the input leads be made of adequate size to minimize resistive losses, and that a good quality capacitor of approximately100 fd be connected di- rectly across the input terminals to assure an adequately low impedance at the input terminals. table i relates nomi- nal resistance values and selected wire sizes. wire size, awg resistance per ft 24 ga 25.7 m ? 22 ga 16.2 m ? 20 ga 10.1 m ? 18 ga 6.4 m ? 16 ga 4.0 m ? 14 ga 2.5 m ? 12 ga 1.6 m ? incorporation of a 100 fd capacitor at the input terminals is recommended as compensation for the dynamic ef- fects of the parasitic resistance of the input cable reacting with the complex impedance of the converter input, and to provide an energy reservoir for transient input current requirements. figure vi. problems of parasitic resistance in input leads vin rtn case enable 1 sync out sync in r p r p i rtn i in e source system ground e rtn 100 fd (see text)
10 www.irf.com afl50xxs series afl50xxs case outlines case x case w pin variation of case y 1.260 1.500 2.500 2.760 3.000 ? 0.128 0.250 1.000 ref 0.200 t y p non-cum 0.050 0.220 pin ? 0.040 0.238 max 0.380 max 2.975 max 1 6 7 12 0.050 0.220 0.250 1.000 pin ? 0.040 0.525 0.380 max 2.800 0.42 case y case z pin variation of case y 1.500 1.750 2.500 0.25 t y p 1.150 0.050 0.220 1 6 7 12 1.750 0.375 2.00 0.250 1.000 ref 0.200 t y p non-cum pin ? 0.040 0.300 ? 0.140 0.238 max 0.380 max 2.975 max 0.050 0.220 0.250 1.000 ref pin ? 0.040 0.525 0.380 max 2.800 0.36 ber yllia w arning : these converters are hermetically sealed; however they contain beo substrates and should not be ground or subjected to any o ther operations including exposure to acids, which may produce beryllium dust or fumes containing beryllium tolerances, unless otherwise specified: .xx = 0.010 .xxx = 0.005
www.irf.com 11 afl50xxs series pin no. designation 1 positive input 2 input return 3 case 4 enable 1 5 sync output 6 sync input 7 positive output 8 output return 9 return sense 10 positive sense 11 share 12 enable 2 afl50xxs pin designation part numbering world headquarters: 233 kansas st., el segundo, california 90245, tel: (310) 322 3331 advanced analog: 2270 martin av., santa clara, california 95050, tel: (408) 727-0500 visit us at www.irf.com for sales contact information . data and specifications subject to change without notice. 07/02 available screening levels and process variations for afl50xxs series. * per commercial standards afl 50 05 s x / ch mode input 28= 28 v, 50= 50 v 120=120 v, 270= 270 v output 3r3= 3.3 v, 05= 5 v 08= 8 v, 09= 9 v 12= 12 v, 15= 15 v 24= 24 v, 28= 28 v output s = single d = dual case w, x, y, z screenin ? , es hb, ch requirement mil-std-883 method no suffix es suffix hb suffix ch suffix temperature range -20c to +85c -55c to +125c -55c to +125c -55c to +125c element evaluation mil-prf-38534 internal visual 2017 yes yes yes temperature cycle 1010 cond b cond c cond c constant acceleration 2001, 500g cond a cond a burn-in 1015 48hrs @ 85c 48hrs @ 125c 160hrs @ 125c 160hrs @ 125c final electrical (group a) mil-prf-38534 25c 25c -55, +25, +125c -55, +25, +125c seal, fine & gross 1014 cond a, c cond a, c cond a, c external visual 2009 yes yes yes

▲Up To Search▲

Price & Availability of AFL12005DZ-ES

	To Download AFL12005DZ-ES Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .